1. Field of the Invention
The present invention relates generally to formation of high-K gate stacks in semiconductor devices. More particularly, methods are provided for formation of high-K gate stacks for MOSFET devices so as to control the MOSFET threshold voltage. Preferred embodiments provide threshold voltage control in conjunction with improved channel carrier mobility.
2. Description of Related Art
Metal-oxide-semiconductor (MOS) devices form the basis of the CMOS (complementary metal-oxide-semiconductor) logic employed in most modern-day integrated circuits. CMOS technology employs nMOS (n-channel) and pMOS (p-channel) field effect transistors (FETs) wired together in a complementary fashion. The gate structure for such MOSFETs is formed as a layer structure, or “stack”, in which one or more layers of dielectric material are formed on a semiconductor (typically silicon) substrate, and the gate electrode is then formed on the dielectric.
Early devices used SiO2 as the gate dielectric with a polysilicon gate electrode. However, as feature sizes decreased to meet scaling demands, the reduction in oxide thickness led to significant gate oxide leakage currents due to direct tunneling. To remedy this for the new generation of VLSI (very large scale integration), the gate dielectric has been replaced by materials with a higher dielectric constant K than SiO2. Such “high-K” dielectrics thus have a dielectric constant higher than 3.9, and typically considerably higher than this. For example, K=5 might be considered moderately high, with K=20 currently being considered very high. The high-K materials used for gate dielectrics are metallic oxides, typically HfO2 or HfOSi. In a related development, metallic gate electrodes have replaced polysilicon gates for improved compatibility with the high-K dielectrics.
As discussed in “Low Tinv (≦1.8 nm) Metal-Gated MOSFETs on SiO2Based Gate Dielectrics for High Performance Logic Applications”, Callegari et al. Int. Conf. SSDM, September 16-18, Tokyo, Japan 2003, electron mobilities of metal/high K gate stacks formed on Si substrates are severely degraded when compared with polysilicon/SiO2 gate stacks. This mobility degradation has been attributed to remote phonon scattering (see “Effective electron mobility in Si inversion layers in MOS systems with a high-k insulator: The role of remote phonon scattering”, M. V. Fischetti et al, J. Appl. Phys. 90, 4587 (2001)) or to remote charge scattering (see “Effective Electron Mobility Reduced by Remote Charge Scattering in High-K Gate Stacks”, M. Hiratani et al., JJAP Vol. 41, p. 4521, (2002)).
An attempt to solve this problem has been proposed in “Charge trapping related threshold voltage instabilities in high permittivity gate dielectric stacks”, A. Callegari et al., J. Appl. Phys. 99, 023079 (2006). This proposes using HfO2 stacks that are graded in concentration towards the silicon channel. This technique led to devices with good electrical properties, and in particular good channel mobilities, but caused too large a shift in the device threshold voltage.
An attempt to solve this additional problem has been presented in “Band-Edge High-Performance High-k/Metal Gate n-MOSFETs using Cap Layers Containing Group IIA and IIIB Elements with Gate-First Processing for 45 nm and Beyond”, V. Narayanan et al., VLSI Symposium, June 2006. This proposed a gate stack structure as illustrated in FIG. 1 of the accompanying drawings. In particular, a lanthanum oxide layer was added on top of the HfO2 dielectric and under the metal gate. This improved the threshold voltage shift but only for nFET devices, not for pFETs. In addition, the introduction of the new layer led to a substantial degradation of mobility in the channel. Other attempts to solve the mobility problem in metal/high K gate stacks propose using Hf silicate materials to reduce phonon scattering and thereby improve mobility. However, these silicate materials have a lower dielectric constant (K˜12) than HfO2 (K˜20), thus limiting device scalability. In particular, a silicate material layer of less than 23 Å appears to be difficult to achieve, whereas HfO2 layers of about 12 Å were achieved in the Callegari et al. 2003 reference above.